[PATCH] D73733: [mlir] [VectorOps] fixed bug in vector.insert_strided_slice lowering

[Alex Zinenko via Phabricator via llvm-commits]

ftynse accepted this revision.
ftynse added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: Joonsoo.

LGTM after changing the test to capture `%arg0` and `%arg1`. Thanks!



================
Comment at: mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir:7
 }
-// CHECK-LABEL: broadcast_vec1d_from_scalar
+// CHECK-LABEL: llvm.func @broadcast_vec1d_from_scalar
 //       CHECK:   llvm.mlir.undef : !llvm<"<2 x float>">
----------------
Nit: these changes to the test look orthogonal to the commit


================
Comment at: mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir:540
+}
+// CHECK-LABEL: llvm.func @insert_strided_slice3(%arg0: !llvm<"[2 x <4 x float>]">, %arg1: !llvm<"[16 x [4 x <8 x float>]]">)
+//      CHECK: %[[s0:.*]] = llvm.extractvalue %arg1[0] : !llvm<"[16 x [4 x <8 x float>]]">
----------------
Let's capture SSA names for arguments as well:

```
CHECK-LABEL: llvm.func @insert_strided_slice3
CHECK-SAME: %[[arg0:.*]]: !llvm<
CHECK-SAME: %[[arg1:.*]]: !llvm<
```

(`CHECK-LABEL` does not support capture)


Repository:
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https://reviews.llvm.org/D73733