[llvm] d6b83d6 - AMDGPU/GlobalISel: Don't use pointless getConstantVRegVal

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 30 06:38:54 PST 2020


Author: Matt Arsenault
Date: 2020-01-30T09:38:43-05:00
New Revision: d6b83d6ba5a1a07e8d4398b28674e181b59c3455

URL: https://github.com/llvm/llvm-project/commit/d6b83d6ba5a1a07e8d4398b28674e181b59c3455
DIFF: https://github.com/llvm/llvm-project/commit/d6b83d6ba5a1a07e8d4398b28674e181b59c3455.diff

LOG: AMDGPU/GlobalISel: Don't use pointless getConstantVRegVal

This is always a G_CONSTANT already

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 4596889d7429..90136f562c2c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -2727,9 +2727,7 @@ void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB,
                                                  int OpIdx) const {
   assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && OpIdx == -1 &&
          "Expected G_CONSTANT");
-  Optional<int64_t> CstVal = getConstantVRegVal(MI.getOperand(0).getReg(), *MRI);
-  assert(CstVal && "Expected constant value");
-  MIB.addImm(CstVal.getValue());
+  MIB.addImm(MI.getOperand(1).getCImm()->getSExtValue());
 }
 
 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB,


        


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