[PATCH] D73666: AMDGPU/GlobalISel: Adjust image load register type based on dmask
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 29 14:35:43 PST 2020
arsenm created this revision.
arsenm added reviewers: nhaehnle, kerbowa.
Herald added subscribers: Petar.Avramovic, jfb, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
arsenm added parent revisions: D73446: AMDGPU/GlobalISel: Legalize a16 images, D73447: AMDGPU/GlobalISel: Legalize non-a16 non-NSA images, D73444: AMDGPU/GlobalISel: Legalize TFE image result loads, D72796: AMDGPU/GlobalISel: Legalize unpacked d16 image operations.
Trim elements that won't be written. The equivalent still needs to be
done for writes. Also start widening 3 elements to 4
elements. Selection will get the count from the dmask.
https://reviews.llvm.org/D73666
Files:
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
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