[PATCH] D73646: [X86] Fix the cost model for v16i16->v16i32 zero_extend/sign_extend with AVX2

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.
craig.topper added a comment.

I guess the cost should be 3 if we count the extract we need to split the 16i16 input. New patch coming in a moment.


We seem to be inheriting the cost from sse4.1. But if we have 256-bit registers we should be able to do this with just two v8i16->v8i32 operations so our cost should be 2 not 4.


https://reviews.llvm.org/D73646

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/arith-fix.ll
  llvm/test/Analysis/CostModel/X86/arith-overflow.ll
  llvm/test/Analysis/CostModel/X86/cast.ll
  llvm/test/Analysis/CostModel/X86/extend.ll
  llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll

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