[PATCH] D73283: Handle complex DWARF expressions in combination with "complex" registers

David Stenberg via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 29 07:21:58 PST 2020


dstenb added inline comments.


================
Comment at: llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp:264-265
+      if (Reg.SubRegisterOffsetInBits > 0) {
+        emitConstu(Reg.SubRegisterOffsetInBits);
+        emitOp(dwarf::DW_OP_shl);
+      }
----------------
The DWARFv5 standard specifies that all operands of logical and arithmetic operations must have the same type, so I think that the shift amount operand must use the same base type as the registers here.

The same issue also exists for the complex expressions that are applied to this function's result, for example the `DW_OP_shr` in the attached test case.

There already exists similar issues for `DW_OP_LLVM_convert`. I recently discovered a case for our downstream target where the following was emitted:

```
DW_OP_bregx 0xf0 +0, DW_OP_convert (0x0000017b) "DW_ATE_unsigned_32", DW_OP_convert (0x00000191) "DW_ATE_unsigned_16", DW_OP_lit31, DW_OP_and, DW_OP_stack_value
```
The `DW_OP_and` is done with one unsigned 16-bit base type operand, and one operand of the generic type. GDB throws an `Incompatible types on DWARF stack` error when trying to print that variable. I'll see if I can create a downstream reproducer for that and write a Bugzilla ticket.

I guess DwarfExpression in some way must keep track of the element types.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73283/new/

https://reviews.llvm.org/D73283





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