[PATCH] D73585: [AMDGPU][GlobalISel] Select 8-byte LDS Ops with 4-byte alignment

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:2353
+  int64_t ConstAddr = 0;
+  if (isBaseWithConstantOffset(Root, *MRI)) {
+    const MachineOperand &LHS = RootDef->getOperand(1);
----------------
arsenm wrote:
> This can use getPtrBaseWithConstantOffset and avoid re-figuring out the offset below
I'll update selectDS1Addr1OffsetImpl too in another patch when I add the constant Addr bits there.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:2371
+    }
+  } else if (RootDef->getOpcode() == AMDGPU::G_SUB) {
+    // TODO
----------------
arsenm wrote:
> G_SUB isn't pointer typed, so this would never happen. This would require looking through G_INTTOPTR
Okay. selectDS1Addr1OffsetImpl needs these implemented as well.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73585/new/

https://reviews.llvm.org/D73585