[PATCH] D71701: [AArch64] Peephole optimization. Merge AND and TST instructions

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

I don't mind taking a look.

First question about where this should live. With `AArch64InstrInfo::mergeInstructions(MachineFunction& MF)` you're iterating of all blocks/instructions, which is typically not something that belongs in `AArch64InstrInfo` because that works on instructions. The generic peephole class does exactly this, which makes calls to e.g. `optimizeCondBranch`. As Eli suggested in the email thread on llvm dev, can you implement and do this in `AArch64InstrInfo::optimizeCondBranch(MachineInstr &MI)`?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D71701/new/

https://reviews.llvm.org/D71701