[PATCH] D73509: [MachineScheduler] relax successfor chain on clustering

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 28 03:28:00 PST 2020


foad added a comment.

This doesn't fix the problem that inspired D71717 <https://reviews.llvm.org/D71717>. Consider the first test case in `memory_clause.ll`. With baseline llvm I get:

  $ bin/llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr -o /dev/null ~/git/llvm-project/llvm/test/CodeGen/AMDGPU/memory_clause.ll -debug-only=machine-scheduler |& egrep "^Cluster|Machine code for function"
  # Machine code for function vector_clause: NoPHIs, TracksLiveness
  Cluster ld/st SU(2) - SU(3)
  Cluster ld/st SU(6) - SU(7)
  Cluster ld/st SU(8) - SU(9)
  Cluster ld/st SU(11) - SU(13)
  # Machine code for function vector_clause: NoPHIs, TracksLiveness
  [...]

Your patch doesn't change this, but with D71717 <https://reviews.llvm.org/D71717> I get:

  $ bin/llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr -o /dev/null ~/git/llvm-project/llvm/test/CodeGen/AMDGPU/memory_clause.ll -debug-only=machine-scheduler |& egrep "^Cluster|Machine code for function"
  # Machine code for function vector_clause: NoPHIs, TracksLiveness
  Cluster ld/st SU(2) - SU(3)
  Cluster ld/st SU(6) - SU(7)
  Cluster ld/st SU(8) - SU(9)
  Cluster ld/st SU(10) - SU(11)
  Cluster ld/st SU(12) - SU(13)
  # Machine code for function vector_clause: NoPHIs, TracksLiveness
  [...]

So now it is considering all of SU(10) .. SU(13) for clustering, instead of just SU(11) and SU(13). The relevant SUs are:

  SU(6):   %12:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %26:vreg_64, %4:sreg_64_xexec, 0, 0, 0, 0, implicit $exec, implicit $exec :: (load 16 from %ir.tmp3, addrspace 1)
  SU(7):   %15:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %26:vreg_64, %4:sreg_64_xexec, 16, 0, 0, 0, implicit $exec, implicit $exec :: (load 16 from %ir.tmp72, addrspace 1)
  SU(8):   %17:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %26:vreg_64, %4:sreg_64_xexec, 32, 0, 0, 0, implicit $exec, implicit $exec :: (load 16 from %ir.tmp116, addrspace 1)
  SU(9):   %19:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %26:vreg_64, %4:sreg_64_xexec, 48, 0, 0, 0, implicit $exec, implicit $exec :: (load 16 from %ir.tmp1510, addrspace 1)
  SU(10):   GLOBAL_STORE_DWORDX4_SADDR %26:vreg_64, %12:vreg_128, %5:sreg_64_xexec, 0, 0, 0, 0, implicit $exec, implicit $exec :: (store 16 into %ir.tmp5, addrspace 1)
  SU(11):   GLOBAL_STORE_DWORDX4_SADDR %26:vreg_64, %15:vreg_128, %5:sreg_64_xexec, 16, 0, 0, 0, implicit $exec, implicit $exec :: (store 16 into %ir.tmp94, addrspace 1)
  SU(12):   GLOBAL_STORE_DWORDX4_SADDR %26:vreg_64, %17:vreg_128, %5:sreg_64_xexec, 32, 0, 0, 0, implicit $exec, implicit $exec :: (store 16 into %ir.tmp138, addrspace 1)
  SU(13):   GLOBAL_STORE_DWORDX4_SADDR %26:vreg_64, %19:vreg_128, %5:sreg_64_xexec, 48, 0, 0, 0, implicit $exec, implicit $exec :: (store 16 into %ir.tmp1712, addrspace 1)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73509/new/

https://reviews.llvm.org/D73509





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