[PATCH] D73482: [AMDGPU] Fix lowering a16 image intrinsics

[Ryan Taylor via Phabricator via llvm-commits]

rtaylor added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:5446-5448
+        SDValue Vec = DAG.getNode(ISD::UNDEF, DL, VectorVT);
+        Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VectorVT, Vec, AddrLo,
+                          DAG.getConstant(0, DL, MVT::i32));
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Couldn't this just be a SCALAR_TO_VECTOR to get the 0th element and create the vector? I think Nicolai mentioned this before?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73482/new/

https://reviews.llvm.org/D73482