[PATCH] D69661: [AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi

Tue Jan 28 03:00:24 PST 2020

foad marked 2 inline comments as done.
foad added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1429

+    if (!ST->partialVCCWritesUpdateVCCZ()) {
+      // Up to gfx9, writes to vcc_lo and vcc_hi don't update vccz.
----------------
arsenm wrote:
> Can you add a comment explaining the difference between the SI bug and the gfx9 bug?
I wasn't involved in the SI bug fix so I simply reinstated the original comment from D16725, which had got lost when this pass was reimplemented in D31161.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69661/new/

https://reviews.llvm.org/D69661