[PATCH] D69661: [AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM with comment since I didn't know there was a second vccz bug



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Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1429
 
+    if (!ST->partialVCCWritesUpdateVCCZ()) {
+      // Up to gfx9, writes to vcc_lo and vcc_hi don't update vccz.
----------------
Can you add a comment explaining the difference between the SI bug and the gfx9 bug?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D69661/new/

https://reviews.llvm.org/D69661