[llvm] 4332f1a - [AMDGPU] Fix GCN regpressure trackers for INLINEASM instructions.

[via llvm-commits]

Author: vpykhtin
Date: 2020-01-27T17:25:25+03:00
New Revision: 4332f1a4c826d9351f005a4b78e0b1823a5943e0

URL: https://github.com/llvm/llvm-project/commit/4332f1a4c826d9351f005a4b78e0b1823a5943e0
DIFF: https://github.com/llvm/llvm-project/commit/4332f1a4c826d9351f005a4b78e0b1823a5943e0.diff

LOG: [AMDGPU] Fix GCN regpressure trackers for INLINEASM instructions.

Differential revision: https://reviews.llvm.org/D73338

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNRegPressure.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
index d593204cba05..c7d4e9f394fb 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -327,8 +327,9 @@ void GCNUpwardRPTracker::recede(const MachineInstr &MI) {
   // update max pressure
   MaxPressure = max(AtMIPressure, MaxPressure);
 
-  for (const auto &MO : MI.defs()) {
-    if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg()) || MO.isDead())
+  for (const auto &MO : MI.operands()) {
+    if (!MO.isReg() || !MO.isDef() ||
+        !Register::isVirtualRegister(MO.getReg()) || MO.isDead())
       continue;
 
     auto Reg = MO.getReg();
@@ -403,8 +404,8 @@ void GCNDownwardRPTracker::advanceToNext() {
   LastTrackedMI = &*NextMI++;
 
   // Add new registers or mask bits.
-  for (const auto &MO : LastTrackedMI->defs()) {
-    if (!MO.isReg())
+  for (const auto &MO : LastTrackedMI->operands()) {
+    if (!MO.isReg() || !MO.isDef())
       continue;
     Register Reg = MO.getReg();
     if (!Register::isVirtualRegister(Reg))