[PATCH] D73412: [TargetLowering] Remove ashr if all our demandedbits already match the sign bit

[Simon Pilgrim via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGc8de7c8f501e: [TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits… (authored by RKSimon).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73412/new/

https://reviews.llvm.org/D73412

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/RISCV/srem-vector-lkk.ll

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