[PATCH] D73340: [llvm-exegesis][NFC] Simplify code.

[Clement Courbet via Phabricator via llvm-commits]

courbet created this revision.
courbet added a reviewer: gchatelet.
Herald added subscribers: mstojanovic, tschuett.
Herald added a project: LLVM.

What we're redoing already exists in the X86 backend, it's called
`X86II::getOperandBias`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D73340

Files:
  llvm/tools/llvm-exegesis/lib/X86/Target.cpp


Index: llvm/tools/llvm-exegesis/lib/X86/Target.cpp
===================================================================
--- llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -673,12 +673,7 @@
   int MemOpIdx = X86II::getMemoryOperandNo(IT.getInstr().Description.TSFlags);
   assert(MemOpIdx >= 0 && "invalid memory operand index");
   // getMemoryOperandNo() ignores tied operands, so we have to add them back.
-  for (unsigned I = 0; I <= static_cast<unsigned>(MemOpIdx); ++I) {
-    const auto &Op = IT.getInstr().Operands[I];
-    if (Op.isTied() && Op.getTiedToIndex() < I) {
-      ++MemOpIdx;
-    }
-  }
+  MemOpIdx += X86II::getOperandBias(IT.getInstr().Description);
   setMemOp(IT, MemOpIdx + 0, MCOperand::createReg(Reg));    // BaseReg
   setMemOp(IT, MemOpIdx + 1, MCOperand::createImm(1));      // ScaleAmt
   setMemOp(IT, MemOpIdx + 2, MCOperand::createReg(0));      // IndexReg


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