[PATCH] D73181: [SCEV] Do not use backedge SCEV of PHI if its input is another PHI
Denis Antrushin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 23 02:00:35 PST 2020
dantrushin updated this revision to Diff 239813.
dantrushin added a comment.
- Check that PHI's input is the PHI from the same block(loop);
- Add comment to test explaining its complexity
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D73181/new/
https://reviews.llvm.org/D73181
Files:
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Analysis/ScalarEvolution/pr44605.ll
Index: llvm/test/Analysis/ScalarEvolution/pr44605.ll
===================================================================
--- /dev/null
+++ llvm/test/Analysis/ScalarEvolution/pr44605.ll
@@ -0,0 +1,67 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Only %local_6_6 and %local_3_4 nodes are important here.
+; All other instructions are needed to lure LLVM into executing
+; specific code to trigger a bug.
+; RUN: opt < %s -indvars -S | FileCheck %s
+define i32 @test() {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER:%.*]]
+; CHECK: outer:
+; CHECK-NEXT: [[LOCAL_6_6:%.*]] = phi i32 [ 10, [[ENTRY:%.*]] ], [ [[TMP5:%.*]], [[LATCH:%.*]] ]
+; CHECK-NEXT: [[LOCAL_4_5:%.*]] = phi i32 [ 56587, [[ENTRY]] ], [ 0, [[LATCH]] ]
+; CHECK-NEXT: [[LOCAL_3_4:%.*]] = phi i32 [ 2, [[ENTRY]] ], [ [[LOCAL_6_6]], [[LATCH]] ]
+; CHECK-NEXT: [[DOTUDIV:%.*]] = udiv i32 [[LOCAL_6_6]], 8361
+; CHECK-NEXT: br label [[INNER:%.*]]
+; CHECK: inner:
+; CHECK-NEXT: [[LOCAL_7_3:%.*]] = phi i32 [ 2, [[OUTER]] ], [ [[TMP3:%.*]], [[INNER]] ]
+; CHECK-NEXT: [[LOCAL_4_5_PN:%.*]] = phi i32 [ [[LOCAL_4_5]], [[OUTER]] ], [ [[TMP2:%.*]], [[INNER]] ]
+; CHECK-NEXT: [[LOCAL_3_31:%.*]] = mul i32 [[LOCAL_4_5_PN]], [[DOTUDIV]]
+; CHECK-NEXT: [[TMP0:%.*]] = mul nuw nsw i32 [[LOCAL_7_3]], [[DOTUDIV]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[LOCAL_3_4]]
+; CHECK-NEXT: [[TMP2]] = add i32 [[TMP1]], [[LOCAL_3_31]]
+; CHECK-NEXT: [[TMP3]] = add nuw nsw i32 [[LOCAL_7_3]], 1
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i32 [[LOCAL_7_3]], 4
+; CHECK-NEXT: br i1 [[TMP4]], label [[LATCH]], label [[INNER]]
+; CHECK: latch:
+; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP2]], [[INNER]] ]
+; CHECK-NEXT: [[TMP5]] = add nuw nsw i32 [[LOCAL_6_6]], 1
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[LOCAL_6_6]], 276
+; CHECK-NEXT: br i1 [[TMP6]], label [[RETURN:%.*]], label [[OUTER]]
+; CHECK: return:
+; CHECK-NEXT: [[DOTLCSSA_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA]], [[LATCH]] ]
+; CHECK-NEXT: ret i32 [[DOTLCSSA_LCSSA]]
+;
+entry:
+ br label %outer
+
+outer:
+ %local_6_6 = phi i32 [ 10, %entry ], [ %5, %latch ]
+ %local_4_5 = phi i32 [ 56587, %entry ], [ 0, %latch ]
+ %local_3_4 = phi i32 [ 2, %entry ], [ %local_6_6, %latch ]
+ %.udiv = udiv i32 %local_6_6, 8361
+ br label %inner
+
+inner:
+ %local_7_3 = phi i32 [ 2, %outer ], [ %3, %inner ]
+ %local_4_5.pn = phi i32 [ %local_4_5, %outer ], [ %2, %inner ]
+ %local_3_31 = mul i32 %local_4_5.pn, %.udiv
+ %0 = mul i32 %local_7_3, %.udiv
+ %1 = sub i32 %0, %local_3_4
+ %2 = add i32 %1, %local_3_31
+ %3 = add nuw nsw i32 %local_7_3, 1
+ %4 = icmp ugt i32 %local_7_3, 4
+ br i1 %4, label %latch, label %inner
+
+latch:
+ %.lcssa = phi i32 [ %2, %inner ]
+ %5 = add nuw nsw i32 %local_6_6, 1
+ %6 = icmp ugt i32 %local_6_6, 276
+ br i1 %6, label %return, label %outer
+
+return:
+ %.lcssa.lcssa = phi i32 [ %.lcssa, %latch ]
+ ret i32 %.lcssa.lcssa
+
+}
+
Index: llvm/lib/Analysis/ScalarEvolution.cpp
===================================================================
--- llvm/lib/Analysis/ScalarEvolution.cpp
+++ llvm/lib/Analysis/ScalarEvolution.cpp
@@ -8235,14 +8235,18 @@
if (!MultipleInitValues && InitValue)
return getSCEV(InitValue);
}
- // Do we have a loop invariant value flowing around the backedge
+ // Do we have a PHI value we can materialize
// for a loop which must execute the backedge?
if (!isa<SCEVCouldNotCompute>(BackedgeTakenCount) &&
isKnownPositive(BackedgeTakenCount) &&
PN->getNumIncomingValues() == 2) {
unsigned InLoopPred = LI->contains(PN->getIncomingBlock(0)) ? 0 : 1;
- const SCEV *OnBackedge = getSCEV(PN->getIncomingValue(InLoopPred));
- if (IsAvailableOnEntry(LI, DT, OnBackedge, PN->getParent()))
+ BasicBlock *Header = PN->getParent();
+ Value *BackedgeVal = PN->getIncomingValue(InLoopPred);
+ const SCEV *OnBackedge = getSCEV(BackedgeVal);
+ if (!(isa<PHINode>(BackedgeVal) &&
+ cast<PHINode>(BackedgeVal)->getParent() == Header) &&
+ IsAvailableOnEntry(LI, DT, OnBackedge, Header))
return OnBackedge;
}
if (auto *BTCC = dyn_cast<SCEVConstant>(BackedgeTakenCount)) {
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