[PATCH] D72934: [ARM,MVE] Support immediate vbicq,vorrq,vmvnq intrinsics.

Simon Tatham via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 22 08:31:48 PST 2020


simon_tatham updated this revision to Diff 239609.
simon_tatham marked an inline comment as done.
simon_tatham edited the summary of this revision.
simon_tatham added a comment.

I've revised the MC representations of VBIC and VORR as suggested, but that was a big enough patch that I've done it separately as D73205 <https://reviews.llvm.org/D73205>. This patch now sits on top of that one.

Changing VBIC and VORR meant I could do the isel for the unpredicated forms in pure Tablegen. But the predicated ones would still have needed C++, because the IR intrinsics would have wanted the immediate in its natural form, but by the time you generate an instruction, it has to be re-encoded as NEON. The simplest way was to stop adding new IR intrinsics, and instead encode the predicated instructions as a select. Then I still get to use isel lowering's conversion into VBICIMM/VORRIMM which does the immediate translation for me.

Adjusting the VMOVL pattern to expect the result of my modified lowering has made all those unrelated MVE codegen tests go back to the way they were before, so the new version of this patch doesn't have to change anything there.

Also added a negative llc test with an immediate that doesn't fit into VBICIMM, to prove that it gets sensibly selected as a different instruction sequence and nothing crashes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72934/new/

https://reviews.llvm.org/D72934

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/include/clang/Sema/Sema.h
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/arm-mve-intrinsics/bitwise-imm.c
  clang/test/Sema/arm-mve-immediates.c
  clang/utils/TableGen/MveEmitter.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/lib/Target/ARM/ARMInstrNEON.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/bitwise-imm.ll

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