[PATCH] D71293: AMDGPU: Generate the correct sequence of code for FDIV32 when correctly-rounded-divide-sqrt is set

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:87-89

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This should be redundant with the below logic


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:96-98

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This should be fully captured by the logic above


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71293/new/

https://reviews.llvm.org/D71293