[PATCH] D73158: [AArch64TTI] AArch64 supports NT vector stores through STNP.

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h:185
+      Type *Ty = DataType->getVectorElementType();
+      return (Ty->isIntegerTy(8) || Ty->isIntegerTy(16) ||
+              Ty->isIntegerTy(32) || Ty->isIntegerTy(64) ||
----------------
Floats too, at least for Neon types?


================
Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h:188-189
+              Ty->isIntegerTy(128)) &&
+             (StoreSize == 16 || StoreSize == 32 || StoreSize == 64 ||
+              StoreSize == 128 || StoreSize == 256);
+    }
----------------
Are these because the vectorizer will run this with:

          // Arbitrarily try a vector of 2 elements.
          Type *VecTy = VectorType::get(T, /*NumElements=*/2);
          ...
          if (!TTI->isLegalNTStore(VecTy, *Alignment))

And decides at that point if it is legal or not? Without knowing real vector widths.


================
Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h:191
+    }
+    return BaseT::isLegalMaskedStore(DataType, Alignment);
+  }
----------------
isLegalMaskedStore->isLegalNTStore

It seems that the base version of isLegalNTStore just checks:
    // By default, assume nontemporal memory stores are available for stores
    // that are aligned and have a size that is a power of 2.
    unsigned DataSize = DL.getTypeStoreSize(DataType);
    return Alignment >= DataSize && isPowerOf2_32(DataSize);
I'm guessing that it is the alignment that is causing problems for these larger vectors?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73158/new/

https://reviews.llvm.org/D73158