[PATCH] D73127: AMDGPU/GlobalISel: Widen non-power-of-2 load results

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 239408.
arsenm edited the summary of this revision.
arsenm added a comment.

Fix more incorrect SI handling, handle more 96-bit splits


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73127/new/

https://reviews.llvm.org/D73127

Files:
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir