[PATCH] D73108: [docs][mips] 10.0 Release notes

Simon Atanasyan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 21 07:25:34 PST 2020


atanasyan created this revision.
atanasyan added reviewers: hans, ruiu, Petar.Avramovic, mstojanovic, arichardson.
Herald added subscribers: jfb, sdardis.
Herald added projects: clang, LLVM.

MIPS specific part of LLVM 10.0 Release notes for LLVM, Clang and LLD.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D73108

Files:
  clang/docs/ReleaseNotes.rst
  lld/docs/ReleaseNotes.rst
  llvm/docs/ReleaseNotes.rst


Index: llvm/docs/ReleaseNotes.rst
===================================================================
--- llvm/docs/ReleaseNotes.rst
+++ llvm/docs/ReleaseNotes.rst
@@ -122,8 +122,21 @@
 Changes to the MIPS Target
 --------------------------
 
- During this release ...
-
+* Improved support for ``octeon`` and added support for ``octeon+``
+  MIPS-family CPU.
+* ``min``, ``max``, ``umin``, ``umax`` atomics now supported on MIPS targets.
+* Now PC-relative relocations are generated for ``.eh_frame`` sections when
+  possible. That allows to link MIPS binaries without having to pass the
+  ``-Wl,-z,notext`` option.
+* Fix evaluating J-format branch (``j``, ``jal``, ...) targets when the
+  instruction is not in the first 256 MB region.
+* Fixed ``jal``, ``sc``, ``scs``, ``ll``, ``lld``, ``la``, ``lw``, ``sw``
+  instructions expanding. Now they accept more types of expression as arguments,
+  correctly handle load/store for ``XGOT`` model, expand using less instructions
+  or registers.
+* Generates ``_mcount`` calls using proper MIPS ABI.
+* Improved support of GlobalISel instruction selection framework. This feature
+  is still in experimental state for MIPS targets though.
 
 Changes to the PowerPC Target
 -----------------------------
Index: lld/docs/ReleaseNotes.rst
===================================================================
--- lld/docs/ReleaseNotes.rst
+++ lld/docs/ReleaseNotes.rst
@@ -30,6 +30,14 @@
   with GNU now. (`r375051
   <https://github.com/llvm/llvm-project/commit/48993d5ab9413f0e5b94dfa292a233ce55b09e3e>`_)
 
+* New ``elf32btsmipn32_fbsd`` and ``elf32ltsmipn32_fbsd`` emulations
+  are supported.
+
+* Relax MIPS ``jalr``and ``jr`` instructions marked by the ``R_MIPS_JALR``
+  relocation.
+
+* Reduced size of linked MIPS binaries.
+
 COFF Improvements
 -----------------
 
Index: clang/docs/ReleaseNotes.rst
===================================================================
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -111,6 +111,9 @@
   In a future release of Clang, we intend to change the default to
   ``-fno-lax-vector-conversions``.
 
+* Improved support for ``octeon`` MIPS-family CPU. Added ``octeon+`` to
+  the list of of CPUs accepted by the driver.
+
 New Compiler Flags
 ------------------
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D73108.239317.patch
Type: text/x-patch
Size: 2280 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200121/871887ca/attachment.bin>


More information about the llvm-commits mailing list