[PATCH] D73079: [LV] Fix predication for branches with matching true and false succs.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: rengolin, hsaito, fhahn, Ayal, dorit, gilr.
Herald added subscribers: rkruppe, hiraditya.
Herald added a project: LLVM.

Currently due to the edge caching, we create wrong predicates for
branches with matching true and false successors. We will cache the
condition for the edge from the true successor, and then lookup the same
edge (src and dst are the same) for the edge to the false successor.

If both successors match, the condition should always be true. At the
moment, we cannot really create constant VPValues, but we can just
create a true condition as X | !X. Later passes will clean that up.

Fixes PR44488.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D73079

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/test/Transforms/LoopVectorize/pr44488-predication.ll

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