[PATCH] D73066: [RISCV] Don't always execute SC for min/max masked AMOs

[James Clarke via Phabricator via llvm-commits]

jrtc27 created this revision.
jrtc27 added reviewers: asb, lenary.
Herald added subscribers: llvm-commits, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, jfb, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.

If we determine from the comparison that no change is needed, there is
no point in us executing the SC and conditionally retrying, since the
AMO can be viewed as having executed atomically at the time of the LR.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D73066

Files:
  llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
  llvm/test/CodeGen/RISCV/atomic-rmw.ll

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