[PATCH] D73059: [IndVarSimplify] Extend previous special case for load use instruction to any narrow type loop variant to avoid extra trunc instruction

[Zhongduo Lin (Jimmy) via Phabricator via llvm-commits]

zhongduo created this revision.
zhongduo added reviewers: sanjoy, efriedma, sebpop, reames, az, javed.absar.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

The widenIVUse avoids generating trunc by evaluating the use as AddRec, this
will not work when:

1. SCEV traces back to an instruction inside the loop that SCEV can not

expand, eg. add %indvar, (load %addr)

2. SCEV finds a loop variant, eg. add %indvar, %loopvariant

While SCEV fails to avoid trunc, we can still try to use instruction
combining approach to prove trunc is not required. This can be further
extended with other instruction combining checks, but for now we handle the
following case (sub can be "add" and "mul", "nsw + sext" can be "nus + zext")

  Src:
    %c = sub nsw %b, %indvar
    %d = sext %c to i64
  Dst:
    %indvar.ext1 = sext %indvar to i64
    %m = sext %b to i64
    %d = sub nsw i64 %m, %indvar.ext1

Therefore, as long as the result of add/sub/mul is extended to wide type with 
right extension and overflow wrap combination, no
trunc is required regardless of how %b is generated. This pattern is common
when calculating address in 64 bit architecture.

Note that this patch reuse almost all the code from D49151 <https://reviews.llvm.org/D49151> by @az:
https://reviews.llvm.org/D49151

It extends it by providing proof of why trunc is unnecessary in more general case,
it should also resolve some of the concerns from the following discussion with @reames.

http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20180910/585945.html


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D73059

Files:
  llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
  llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll

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