[PATCH] D71785: [InstCombine][AMDGPU] Trim components of s_buffer_load
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 17 08:06:00 PST 2020
arsenm added inline comments.
================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:1027
+
+ // Start assuming the prefix of elements is demanded, but possibly clear some other bits if
+ // there are trailing zeros (unused components at front) and update offset.
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I think this goes over the 80 column limit
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Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:1048
+ break;
+ case Intrinsic::amdgcn_buffer_load:
+ case Intrinsic::amdgcn_struct_buffer_load:
----------------
Probably shouldn't bother with the legacy intrinsic, I have a patch almost ready to remove them
================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:1062
+ auto Offset = II->getArgOperand(OffsetIdx);
+ unsigned SingleComponentSizeInBits = getDataLayout().getTypeSizeInBits(II->getType()->getScalarType());
+ unsigned OffsetAdd = UnusedComponentsAtFront * SingleComponentSizeInBits / 8;
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Line length
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Comment at: llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll:847
+}
+
+declare float @llvm.amdgcn.s.buffer.load.f32(<4 x i32>, i32, i32) #1
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Need some 8 and 16 bit element tests at least
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71785/new/
https://reviews.llvm.org/D71785
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