[PATCH] D72853: [GlobalISel] Don't arbitrarily limit a mask to 64 bits
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 16 08:19:29 PST 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG885260d5d805: [GlobalISel] Don't arbitrarily limit a mask to 64 bits (authored by foad).
Changed prior to commit:
https://reviews.llvm.org/D72853?vs=238504&id=238510#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D72853/new/
https://reviews.llvm.org/D72853
Files:
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Index: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -1436,9 +1436,10 @@
// Do the arithmetic in the larger type.
auto NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSZext, RHSZext});
LLT OrigTy = MRI.getType(MI.getOperand(0).getReg());
- APInt Mask = APInt::getAllOnesValue(OrigTy.getSizeInBits());
+ APInt Mask =
+ APInt::getLowBitsSet(WideTy.getSizeInBits(), OrigTy.getSizeInBits());
auto AndOp = MIRBuilder.buildAnd(
- WideTy, NewOp, MIRBuilder.buildConstant(WideTy, Mask.getZExtValue()));
+ WideTy, NewOp, MIRBuilder.buildConstant(WideTy, Mask));
// There is no overflow if the AndOp is the same as NewOp.
MIRBuilder.buildICmp(CmpInst::ICMP_NE, MI.getOperand(1), NewOp, AndOp);
// Now trunc the NewOp to the original result.
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