[PATCH] D71773: [AArch64][SVE] Update the definition of AdvSIMD_GatherLoad_VecTorBase_Intrinsic

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-imm-offset.ll:178
+; CHECK-LABEL: gld1b_s_imm_offset_oor:
+; CHECK: mov	w8, #32
+; CHECK-NEXT: ld1b { z0.s }, p0/z, [x8, z0.s, uxtw]
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sdesmalen wrote:
> this needs to be a `mov w8, #128` (scaled by the element size, 4) instead.
Sorry, I pasted this with the wrong example. My comment related to `llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32`.


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https://reviews.llvm.org/D71773