[PATCH] D72620: AMDGPU/GlobalISel: Add documentation for RegisterBankInfo

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa added a comment.

A nice summary!



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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:22
+/// Copying from VGPR to SGPR is generally illegal, unless the value is known to
+/// be uniform. It is generally not valid to legalize operand by inserting
+/// copies as on other targets. Operations which require uniform, SGPR operands
----------------
operand -> operands


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:34
+/// to be able to unambiguously go back from a register class to a register
+/// bank. To disambiguate determine whether an SGPR should use the SGPR or VCC
+/// register bank, we need to know the use context type. An SGPR s1 value always
----------------
Fix: "disambiguate determine"


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72620/new/

https://reviews.llvm.org/D72620