[llvm] e26a78e - Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - "[AArch64][GlobalISel]: Support @llvm.{return, frame}address selection."

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-01-15T12:37:37Z
New Revision: e26a78e70857273c83aaacd4aa0edb36effe70e3

URL: https://github.com/llvm/llvm-project/commit/e26a78e70857273c83aaacd4aa0edb36effe70e3
DIFF: https://github.com/llvm/llvm-project/commit/e26a78e70857273c83aaacd4aa0edb36effe70e3.diff

LOG: Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - "[AArch64][GlobalISel]: Support @llvm.{return,frame}address selection."

These intrinsics expand to a variable number of instructions so just like in
ISelLowering.cpp we use custom code to deal with them.

Committing Tim's original patch.

Differential Revision: https://reviews.llvm.org/D65656
----
Breaks EXPENSIVE_CHECKS builds.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp

Removed: 
    llvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll
    llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 9f9cc7d7c9ec..b9ac2657e1c5 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -4091,7 +4091,7 @@ bool AArch64InstructionSelector::selectIntrinsic(
   switch (IntrinID) {
   default:
     break;
-  case Intrinsic::aarch64_crypto_sha1h: {
+  case Intrinsic::aarch64_crypto_sha1h:
     Register DstReg = I.getOperand(0).getReg();
     Register SrcReg = I.getOperand(2).getReg();
 
@@ -4130,43 +4130,6 @@ bool AArch64InstructionSelector::selectIntrinsic(
     I.eraseFromParent();
     return true;
   }
-  case Intrinsic::frameaddress:
-  case Intrinsic::returnaddress: {
-    MachineFunction &MF = *I.getParent()->getParent();
-    MachineFrameInfo &MFI = MF.getFrameInfo();
-
-    unsigned Depth = I.getOperand(2).getImm();
-    Register DstReg = I.getOperand(0).getReg();
-    RBI.constrainGenericRegister(DstReg, AArch64::GPR64RegClass, MRI);
-
-    if (Depth == 0 && IntrinID == Intrinsic::returnaddress) {
-      MFI.setReturnAddressIsTaken(true);
-      MF.addLiveIn(AArch64::LR, &AArch64::GPR64RegClass);
-      I.getParent()->addLiveIn(AArch64::LR);
-      MIRBuilder.buildCopy({DstReg}, {Register(AArch64::LR)});
-      I.eraseFromParent();
-      return true;
-    }
-
-    MFI.setFrameAddressIsTaken(true);
-    Register FrameAddr(AArch64::FP);
-    while (Depth--) {
-      Register NextFrame = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
-      MIRBuilder.buildInstr(AArch64::LDRXui, {NextFrame}, {FrameAddr}).addImm(0);
-      FrameAddr = NextFrame;
-    }
-
-    if (IntrinID == Intrinsic::frameaddress)
-      MIRBuilder.buildCopy({DstReg}, {FrameAddr});
-    else {
-      MFI.setReturnAddressIsTaken(true);
-      MIRBuilder.buildInstr(AArch64::LDRXui, {DstReg}, {FrameAddr}).addImm(1);
-    }
-
-    I.eraseFromParent();
-    return true;
-  }
-  }
   return false;
 }
 

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll b/llvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll
deleted file mode 100644
index 83bea900bb64..000000000000
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc -mtriple=arm64-apple-ios -global-isel -o - %s | FileCheck %s
-
-define i8* @rt0(i32 %x) nounwind readnone {
-entry:
-; CHECK-LABEL: rt0:
-; CHECK: mov x0, x29
-  %0 = tail call i8* @llvm.frameaddress(i32 0)
-  ret i8* %0
-}
-
-define i8* @rt2() nounwind readnone {
-entry:
-; CHECK-LABEL: rt2:
-; CHECK: ldr x[[reg:[0-9]+]], [x29]
-; CHECK: ldr x0, [x[[reg]]]
-  %0 = tail call i8* @llvm.frameaddress(i32 2)
-  ret i8* %0
-}
-
-declare i8* @llvm.frameaddress(i32) nounwind readnone

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll b/llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll
deleted file mode 100644
index 137f3266704b..000000000000
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll
+++ /dev/null
@@ -1,22 +0,0 @@
-; RUN: llc -mtriple=arm64-apple-ios -global-isel -o - %s | FileCheck %s
-
-define i8* @rt0(i32 %x) nounwind readnone {
-entry:
-; CHECK-LABEL: rt0:
-; CHECK-NOT: stp
-; CHECK: mov x0, x30
-  %0 = tail call i8* @llvm.returnaddress(i32 0)
-  ret i8* %0
-}
-
-define i8* @rt2() nounwind readnone {
-entry:
-; CHECK-LABEL: rt2:
-; CHECK: ldr x[[reg:[0-9]+]], [x29]
-; CHECK: ldr x[[reg]], [x[[reg]]]
-; CHECK: ldr x0, [x[[reg]], #8]
-  %0 = tail call i8* @llvm.returnaddress(i32 2)
-  ret i8* %0
-}
-
-declare i8* @llvm.returnaddress(i32) nounwind readnone