[PATCH] D71215: [AArch64][SVE] Add patterns for unpredicated load/store to frame-indices.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 15 03:51:53 PST 2020


sdesmalen marked 2 inline comments as done.
sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:2237
+    // Width = mbytes * elements
+    Scale = 16;
+    Width = SVEMaxBytesPerVector;
----------------
sdesmalen wrote:
> efriedma wrote:
> > sdesmalen wrote:
> > > efriedma wrote:
> > > > This seems sort of confusing. "Scale" here is implicitly multiplied by vl, and there's isn't any way for the caller to tell except by checking the opcode.
> > > I'm not sure if is an actual issue in practice though. Are you suggesting to make Scale a `TypeSize` instead of an `unsigned`?
> > Yes, that would force the callers to explicitly handle scalable types.  It looks like some of them don't.
> Given that this is a change propagates through the rest of the code-base, I will do this in a separate patch.
I've implemented this change in D72758.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71215/new/

https://reviews.llvm.org/D71215





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