[llvm] 36eedfc - [PowerPC] Fix powerpcspe subtarget enablement in llvm backend
Justin Hibbits via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 14 20:09:45 PST 2020
Author: Justin Hibbits
Date: 2020-01-14T22:07:03-06:00
New Revision: 36eedfcb3cea6d4fb0c5998e63596502eb7d32f0
URL: https://github.com/llvm/llvm-project/commit/36eedfcb3cea6d4fb0c5998e63596502eb7d32f0
DIFF: https://github.com/llvm/llvm-project/commit/36eedfcb3cea6d4fb0c5998e63596502eb7d32f0.diff
LOG: [PowerPC] Fix powerpcspe subtarget enablement in llvm backend
Summary:
As currently written, -target powerpcspe will enable SPE regardless of
disabling the feature later on in the command line. Instead, change
this to just set a default CPU to 'e500' instead of a generic CPU.
As part of this, add FeatureSPE to the e500 definition.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D72673
Added:
Modified:
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index 266b5bf1ba5f..bef0a81ee3ad 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -442,7 +442,7 @@ def : ProcessorModel<"g5", G5Model,
def : ProcessorModel<"e500", PPCE500Model,
[DirectiveE500,
FeatureICBT, FeatureBookE,
- FeatureISEL, FeatureMFTB]>;
+ FeatureISEL, FeatureMFTB, FeatureSPE]>;
def : ProcessorModel<"e500mc", PPCE500mcModel,
[DirectiveE500mc,
FeatureSTFIWX, FeatureICBT, FeatureBookE,
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 77122e62dd5f..0997f68bd999 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -127,6 +127,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
// If cross-compiling with -march=ppc64le without -mcpu
if (TargetTriple.getArch() == Triple::ppc64le)
CPUName = "ppc64le";
+ else if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+ CPUName = "e500";
else
CPUName = "generic";
}
@@ -151,9 +153,6 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
TargetTriple.isMusl())
SecurePlt = true;
- if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
- HasSPE = true;
-
if (HasSPE && IsPPC64)
report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
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