[PATCH] D72654: [SVE] Add patterns for MUL immediate instruction.

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/test/CodeGen/AArch64/sve-neg-int-arith-imm-2.ll:1
+; RUN: not llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s
+
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"not llc"?  Do we not have a pattern for a general SVE vector multiply yet?  In that case, I guess this is fine for now.  But please add a note explaining that.

We should probably prioritize adding those patterns.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72654/new/

https://reviews.llvm.org/D72654