[PATCH] D72706: [MachineScheduler] Reduce reordering due to mem op clustering

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 14 07:53:02 PST 2020


foad created this revision.
foad added reviewers: atrick, MatzeB, arsenm, rampitec, t.p.northover.
Herald added subscribers: arphaman, javed.absar, hiraditya, kristof.beyls, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.

Mem op clustering adds a weak edge in the DAG between two loads or
stores that should be clustered, but the direction of this edge is
pretty arbitrary (it depends on the sort order of MemOpInfo, which
represents the operands of a load or store). This often means that two
loads or stores will get reordered even if they would naturally have
been scheduled together anyway, which leads to test case churn and goes
against the scheduler's "do no harm" philosophy.

The fix makes sure that the direction of the edge always matches the
original code order of the instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D72706

Files:
  llvm/lib/CodeGen/MachineScheduler.cpp
  llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
  llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
  llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
  llvm/test/CodeGen/AArch64/expand-select.ll
  llvm/test/CodeGen/AArch64/global-merge-group-by-use.ll
  llvm/test/CodeGen/AArch64/machine-scheduler.mir
  llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
  llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
  llvm/test/CodeGen/AMDGPU/call-argument-types.ll
  llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
  llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  llvm/test/CodeGen/AMDGPU/ds_read2.ll
  llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
  llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/test/CodeGen/AMDGPU/kernel-args.ll
  llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
  llvm/test/CodeGen/AMDGPU/max.i16.ll
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
  llvm/test/CodeGen/AMDGPU/shift-i128.ll
  llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D72706.237978.patch
Type: text/x-patch
Size: 32339 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200114/3fd383da/attachment-0001.bin>


More information about the llvm-commits mailing list