[llvm] 484a747 - [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
Puyan Lotfi via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 13 10:40:40 PST 2020
Author: Puyan Lotfi
Date: 2020-01-13T13:39:54-05:00
New Revision: 484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29
URL: https://github.com/llvm/llvm-project/commit/484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29
DIFF: https://github.com/llvm/llvm-project/commit/484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29.diff
LOG: [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that differ only
in their FrameIndex MachineOperand values no longer collide. For instance:
%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1
Prior to this patch these instructions would collide together.
Differential Revision: https://reviews.llvm.org/D71583
Added:
llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir
Modified:
llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
index d0670dcc406e..fcc40b26c527 100644
--- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
+++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
@@ -68,6 +68,8 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) {
return MO.getImm();
case MachineOperand::MO_TargetIndex:
return MO.getOffset() | (MO.getTargetFlags() << 16);
+ case MachineOperand::MO_FrameIndex:
+ return llvm::hash_value(MO);
// We could explicitly handle all the types of the MachineOperand,
// here but we can just return a common number until we find a
@@ -77,7 +79,6 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) {
// TODO: Handle the following Index/ID/Predicate cases. They can
// be hashed on in a stable manner.
- case MachineOperand::MO_FrameIndex:
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_JumpTableIndex:
case MachineOperand::MO_CFIIndex:
diff --git a/llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir b/llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir
new file mode 100644
index 000000000000..68158563a6de
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir
@@ -0,0 +1,23 @@
+# RUN: llc -mtriple x86_64-linux-gnu -run-pass mir-canonicalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+...
+---
+name: f
+stack:
+ - { id: 0, size: 4 }
+ - { id: 1, size: 4 }
+fixedStack:
+ - { id: 0, offset: 0, size: 4 }
+ - { id: 1, offset: 0, size: 4 }
+body: |
+ bb.1:
+ ; CHECK: _1:_(p0) = G_FRAME_INDEX %stack.{{[0-1]}}
+ ; CHECK: _1:_(p0) = G_FRAME_INDEX %stack.{{[0-1]}}
+ ; CHECK: _1:gr32 = MOV32rm %fixed-stack.{{[0-1]}}
+ ; CHECK: _1:gr32 = MOV32rm %fixed-stack.{{[0-1]}}
+ %1:_(p0) = G_FRAME_INDEX %stack.0
+ %2:_(p0) = G_FRAME_INDEX %stack.1
+ %3:gr32 = MOV32rm %fixed-stack.0, 1, _, 0, _
+ %4:gr32 = MOV32rm %fixed-stack.1, 1, _, 0, _
+
+...
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