[PATCH] D72610: GlobalISel: Implement fewerElementsVector for G_SEXT_INREG

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: paquette, aemerson, aditya_nandakumar, dsanders.
Herald added subscribers: Petar.Avramovic, volkan, hiraditya, tschuett, rovka, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.
arsenm added parent revisions: D72511: GlobalISel: Handle more cases of G_SEXT narrowing, D72608: GlobalISel: Don't ignore requested ext narrowing type.

Start using a new strategy with a combination of merge and unmerges.

      

This allows scalarizing before lowering, which in cases like
<2 x s128> avoids producing giant illegal shifts.


https://reviews.llvm.org/D72610

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir

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