[PATCH] D70680: [ARM][Thumb2] Fix ADD/SUB invalid writes to SP
Diogo N. Sampaio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 13 03:38:45 PST 2020
dnsampaio updated this revision to Diff 237617.
dnsampaio added a comment.
Herald added a subscriber: gbedwell.
Herald added a reviewer: andreadb.
- Fixed the destination register class when converting ADDrr to ADDri or ADDspImm. Added test
- Fixed the number of arguments when converting t2SUBspImm to tSUBspi by adding a register at the end. Else, it would break llvm-mca that expects the number of operands to follow the table-gen, even when not used by the instruction.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70680/new/
https://reviews.llvm.org/D70680
Files:
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/ARM/ARMInstrThumb2.td
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
llvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir
llvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
llvm/test/CodeGen/Thumb2/bug-subw.ll
llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
llvm/test/CodeGen/Thumb2/mve-stacksplot.mir
llvm/test/CodeGen/Thumb2/peephole-addsub.mir
llvm/test/CodeGen/Thumb2/peephole-cmp.mir
llvm/test/CodeGen/Thumb2/t2peephole-t2ADDrr-to-t2ADDri.ll
llvm/test/MC/ARM/basic-thumb2-instructions.s
llvm/test/MC/ARM/invalid-addsub.s
llvm/test/MC/ARM/negative-immediates.s
llvm/test/MC/ARM/register-token-source-loc.s
llvm/test/MC/ARM/thumb-diagnostics.s
llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt
llvm/test/MC/Disassembler/ARM/thumb-tests.txt
llvm/test/MC/Disassembler/ARM/thumb2-v8.txt
llvm/test/MC/Disassembler/ARM/thumb2.txt
llvm/test/tools/llvm-mca/ARM/simple-cortex-m33.s
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