[PATCH] D72574: [PowerPC][Future] Add pld and pstd to future CPU

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp created this revision.
stefanp added reviewers: power-llvm-team, nemanjai, hfinkel.
Herald added subscribers: shchenz, jsji, kbarton, hiraditya.
Herald added a project: LLVM.

Add the prefixed instructions `pld` and `pstd` to future CPU. These are load and store instructions that require new operand types that are 34 bits. This patch adds the two instructions as well as the operand types required.

Note that this patch also makes a minor change to tablegen to account for the fact that some instructions are going to require shifts greater than 31 bits for the new 34 bit instructions.


https://reviews.llvm.org/D72574

Files:
  llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/MC/Disassembler/PowerPC/future-invalid.txt
  llvm/test/MC/Disassembler/PowerPC/futureinsts.txt
  llvm/test/MC/PowerPC/future-errors.s
  llvm/test/MC/PowerPC/future.s
  llvm/test/TableGen/FixedLenDecoderEmitter/InitValue.td
  llvm/utils/TableGen/FixedLenDecoderEmitter.cpp

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