[PATCH] D72569: [PowerPC][Future] Add prefixed instruction paddi to future CPU

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp created this revision.
stefanp added reviewers: power-llvm-team, nemanjai, hfinkel.
Herald added subscribers: shchenz, jsji, kbarton, hiraditya.
Herald added a project: LLVM.

Future CPU will include support for prefixed instructions. These prefixed instructions are formed by a 4 byte prefix immediately followed by a 4 byte instruction effectively making an 8 byte instruction. The new instruction `paddi` is a prefixed form of `addi`.

This patch adds `paddi` and all of the support required for that instruction. The majority of the patch deals with supporting the new prefixed instructions. The addition of `paddi` is mainly to allow for testing.


https://reviews.llvm.org/D72569

Files:
  llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
  llvm/lib/Target/PowerPC/PPC.td
  llvm/lib/Target/PowerPC/PPCInstrFormats.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/lib/Target/PowerPC/PPCScheduleP9.td
  llvm/lib/Target/PowerPC/PPCSubtarget.h
  llvm/test/CodeGen/PowerPC/future-check-features.ll
  llvm/test/MC/Disassembler/PowerPC/futureinsts.txt
  llvm/test/MC/PowerPC/future.s

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