[llvm] 51c1d7c - [X86][Disassembler] Simplify
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 12 00:58:26 PST 2020
Author: Fangrui Song
Date: 2020-01-12T00:53:35-08:00
New Revision: 51c1d7c4bec025f70679284060b82c05242759b2
URL: https://github.com/llvm/llvm-project/commit/51c1d7c4bec025f70679284060b82c05242759b2
DIFF: https://github.com/llvm/llvm-project/commit/51c1d7c4bec025f70679284060b82c05242759b2.diff
LOG: [X86][Disassembler] Simplify
Added:
Modified:
llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 4e929d586d82..788607778a70 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -97,12 +97,6 @@ void llvm::X86Disassembler::Debug(const char *file, unsigned line,
dbgs() << file << ":" << line << ": " << s;
}
-StringRef llvm::X86Disassembler::GetInstrName(unsigned Opcode,
- const void *mii) {
- const MCInstrInfo *MII = static_cast<const MCInstrInfo *>(mii);
- return MII->getName(Opcode);
-}
-
#define debug(s) LLVM_DEBUG(Debug(__FILE__, __LINE__, s));
namespace llvm {
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
index 7ab9e8f60f78..adbba562d22b 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
@@ -15,6 +15,7 @@
#include "X86DisassemblerDecoder.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/MC/MCInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -60,18 +61,6 @@ struct ContextDecision {
#define debug(s) do { } while (0)
#endif
-/*
- * contextForAttrs - Client for the instruction context table. Takes a set of
- * attributes and returns the appropriate decode context.
- *
- * @param attrMask - Attributes, from the enumeration attributeBits.
- * @return - The InstructionContext to use when looking up an
- * an instruction with these attributes.
- */
-static InstructionContext contextForAttrs(uint16_t attrMask) {
- return static_cast<InstructionContext>(CONTEXTS_SYM[attrMask]);
-}
-
/*
* modRMRequired - Reads the appropriate instruction table to determine whether
* the ModR/M byte is required to decode a particular instruction.
@@ -86,7 +75,7 @@ static InstructionContext contextForAttrs(uint16_t attrMask) {
static int modRMRequired(OpcodeType type,
InstructionContext insnContext,
uint16_t opcode) {
- const struct ContextDecision* decision = nullptr;
+ const struct ContextDecision *decision;
switch (type) {
case ONEBYTE:
@@ -698,7 +687,7 @@ static int getIDWithAttrMask(uint16_t* instructionID,
uint16_t attrMask) {
bool hasModRMExtension;
- InstructionContext instructionClass = contextForAttrs(attrMask);
+ auto instructionClass = InstructionContext(CONTEXTS_SYM[attrMask]);
hasModRMExtension = modRMRequired(insn->opcodeType,
instructionClass,
@@ -774,7 +763,7 @@ static bool is64Bit(const char *name) {
* @return - 0 if the ModR/M could be read when needed or was not needed;
* nonzero otherwise.
*/
-static int getID(struct InternalInstruction* insn, const MCInstrInfo *miiArg) {
+static int getID(struct InternalInstruction* insn, const MCInstrInfo *mii) {
uint16_t attrMask;
uint16_t instructionID;
@@ -946,7 +935,7 @@ static int getID(struct InternalInstruction* insn, const MCInstrInfo *miiArg) {
return 0;
}
- auto SpecName = GetInstrName(instructionIDWithREXW, miiArg);
+ auto SpecName = mii->getName(instructionIDWithREXW);
// If not a 64-bit instruction. Switch the opcode.
if (!is64Bit(SpecName.data())) {
insn->instructionID = instructionIDWithREXW;
@@ -1018,8 +1007,8 @@ static int getID(struct InternalInstruction* insn, const MCInstrInfo *miiArg) {
return 0;
}
- specName = GetInstrName(instructionID, miiArg);
- specWithOpSizeName = GetInstrName(instructionIDWithOpsize, miiArg);
+ specName = mii->getName(instructionID);
+ specWithOpSizeName = mii->getName(instructionIDWithOpsize);
if (is16BitEquivalent(specName.data(), specWithOpSizeName.data()) &&
(insn->mode == MODE_16BIT) ^ insn->hasOpSize) {
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
index df4085edb818..08cd52e6b974 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
@@ -505,25 +505,6 @@ enum VectorExtensionType {
TYPE_XOP = 0x4
};
-/// Type for the byte reader that the consumer must provide to
-/// the decoder. Reads a single byte from the instruction's address space.
-/// \param arg A baton that the consumer can associate with any internal
-/// state that it needs.
-/// \param byte A pointer to a single byte in memory that should be set to
-/// contain the value at address.
-/// \param address The address in the instruction's address space that should
-/// be read from.
-/// \return -1 if the byte cannot be read for any reason; 0 otherwise.
-typedef int (*byteReader_t)(const void *arg, uint8_t *byte, uint64_t address);
-
-/// Type for the logging function that the consumer can provide to
-/// get debugging output from the decoder.
-/// \param arg A baton that the consumer can associate with any internal
-/// state that it needs.
-/// \param log A string that contains the message. Will be reused after
-/// the logger returns.
-typedef void (*dlog_t)(void *arg, const char *log);
-
/// The specification for how to extract and interpret a full instruction and
/// its operands.
struct InstructionSpecifier {
@@ -664,8 +645,6 @@ int decodeInstruction(InternalInstruction *insn, const MCInstrInfo *mii);
/// \param s The message to print.
void Debug(const char *file, unsigned line, const char *s);
-StringRef GetInstrName(unsigned Opcode, const void *mii);
-
} // namespace X86Disassembler
} // namespace llvm
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