[PATCH] D71563: [SCEV] Recognise the hardwareloop "loop.decrement.reg" intrinsic

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

SCEV code looks fine, no comment on the expected semantics of the intrinsic.



================
Comment at: llvm/lib/Analysis/ScalarEvolution.cpp:4512
+  // semantics as a Sub, return a binary sub expression.
+  if (auto *II = dyn_cast<IntrinsicInst>(V)) {
+    switch (II->getIntrinsicID()) {
----------------
This might be slightly cleaner using m_Intrinsic pattern match, but it's minor at best and a subjective judgement call.  Take your pick.  


================
Comment at: llvm/lib/Analysis/ScalarEvolution.cpp:4513
+  if (auto *II = dyn_cast<IntrinsicInst>(V)) {
+    switch (II->getIntrinsicID()) {
+    case Intrinsic::loop_decrement_reg:
----------------
Rather than a single case switch, use a if please.


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  https://reviews.llvm.org/D71563/new/

https://reviews.llvm.org/D71563