[PATCH] D72509: [ARM][LowOverheadLoops] Allow all MVE instrs.
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 10 07:46:21 PST 2020
samparker created this revision.
samparker added reviewers: SjoerdMeijer, dmgreen.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: LLVM.
samparker added a parent revision: D72504: [ARM][LowOverheadLoops] Change predicate inspection.
We have a whitelist of instructions that we allow when tail predicating, since these are trivial ones that we've deemed need no special handling. Now change ARMLowOverheadLoops to allow the non-trivial instructions if they're contained within a valid VPT block. Since a valid block is one that is predicated upon the VCTP so we know that these non-trivial instructions will still behave as expected once the implicit predication is used instead.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D72509
Files:
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
llvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D72509.237324.patch
Type: text/x-patch
Size: 34397 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200110/416e99b5/attachment.bin>
More information about the llvm-commits
mailing list