[PATCH] D72471: [RISCV] Check register class for AMO memory operands

James Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 9 11:48:24 PST 2020


jrtc27 created this revision.
jrtc27 added reviewers: asb, lenary.
Herald added subscribers: llvm-commits, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D72471

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoA.td
  llvm/test/MC/RISCV/rva-aliases-invalid.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D72471.237142.patch
Type: text/x-patch
Size: 7636 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200109/cd8bd4f5/attachment-0001.bin>


More information about the llvm-commits mailing list