[PATCH] D71568: [InstCombine] `select + mul` -> `select + shl` with power of twos.
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 9 09:36:39 PST 2020
spatel added a comment.
In D71568#1812355 <https://reviews.llvm.org/D71568#1812355>, @spatel wrote:
> There's a lot going on here, and the patch doesn't apply cleanly to current source. Can you pre-commit any NFC changes/tests to make this patch smaller? For example, the udiv change/tests are not affected by the mul code?
Sorry - I didn't see earlier that this patch is part of a sequence.
I'm a bit skeptical about the need to extend the "udiv action" machine. Are the motivating cases really that complicated or could we get away with a simpler pattern match of mul(select...)?
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https://reviews.llvm.org/D71568/new/
https://reviews.llvm.org/D71568
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