[PATCH] D71568: [InstCombine] `select + mul` -> `select + shl` with power of twos.

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

There's a lot going on here, and the patch doesn't apply cleanly to current source. Can you pre-commit any NFC changes/tests to make this patch smaller? For example, the udiv change/tests are not affected by the mul code?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D71568/new/

https://reviews.llvm.org/D71568