[PATCH] D71655: [MachineScheduler] Allow clustering mem ops with complex addresses
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 8 08:18:46 PST 2020
arsenm added a comment.
Mostly LGTM, except this diff seems to have absorbed a number of recent changes into the diff
================
Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:1748
const DebugLoc &DL, Register Src,
unsigned SrcSubReg,
Register Dst) const {
----------------
Somehow absorbed some of a diff from a few weeks ago
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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:2035-2038
if (!BaseOp->isReg() && !BaseOp->isFI())
return false;
return true;
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Fold into return BaseOp->isReg() || BaseOp->isFI();
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:5880-5888
// If we have a noreturn caller, then we're going to be conservative and
// say that we have to save LR. If we don't have a ret at the end of the
// block, then we can't reason about liveness accurately.
//
// FIXME: We can probably do better than always disabling this in
// noreturn functions by fixing up the liveness info.
----------------
Looks like an unrelated change?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71655/new/
https://reviews.llvm.org/D71655
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