[llvm] 0b8ce37 - [InstSimplify] add tests for select of true/false; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 8 13:22:57 PST 2020
Author: Sanjay Patel
Date: 2020-01-08T16:22:48-05:00
New Revision: 0b8ce37d64747ba7d8908626256e2b5e58f7b396
URL: https://github.com/llvm/llvm-project/commit/0b8ce37d64747ba7d8908626256e2b5e58f7b396
DIFF: https://github.com/llvm/llvm-project/commit/0b8ce37d64747ba7d8908626256e2b5e58f7b396.diff
LOG: [InstSimplify] add tests for select of true/false; NFC
Added:
Modified:
llvm/test/Transforms/InstSimplify/select.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstSimplify/select.ll b/llvm/test/Transforms/InstSimplify/select.ll
index d640805f86b8..5581a3bd7471 100644
--- a/llvm/test/Transforms/InstSimplify/select.ll
+++ b/llvm/test/Transforms/InstSimplify/select.ll
@@ -1,9 +1,36 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instsimplify -S | FileCheck %s
+define i1 @bool_true_or_false(i1 %cond) {
+; CHECK-LABEL: @bool_true_or_false(
+; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], i1 true, i1 false
+; CHECK-NEXT: ret i1 [[S]]
+;
+ %s = select i1 %cond, i1 true, i1 false
+ ret i1 %s
+}
+
+define <2 x i1> @bool_true_or_false_vec(<2 x i1> %cond) {
+; CHECK-LABEL: @bool_true_or_false_vec(
+; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i1> <i1 true, i1 true>, <2 x i1> zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[S]]
+;
+ %s = select <2 x i1> %cond, <2 x i1> <i1 true, i1 true>, <2 x i1> zeroinitializer
+ ret <2 x i1> %s
+}
+
+define <2 x i1> @bool_true_or_false_vec_undef(<2 x i1> %cond) {
+; CHECK-LABEL: @bool_true_or_false_vec_undef(
+; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i1> <i1 undef, i1 true>, <2 x i1> <i1 false, i1 undef>
+; CHECK-NEXT: ret <2 x i1> [[S]]
+;
+ %s = select <2 x i1> %cond, <2 x i1> <i1 undef, i1 true>, <2 x i1> <i1 false, i1 undef>
+ ret <2 x i1> %s
+}
+
define <2 x i8> @vsel_tvec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @vsel_tvec(
-; CHECK-NEXT: ret <2 x i8> %x
+; CHECK-NEXT: ret <2 x i8> [[X:%.*]]
;
%s = select <2 x i1><i1 true, i1 true>, <2 x i8> %x, <2 x i8> %y
ret <2 x i8> %s
@@ -11,7 +38,7 @@ define <2 x i8> @vsel_tvec(<2 x i8> %x, <2 x i8> %y) {
define <2 x i8> @vsel_fvec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @vsel_fvec(
-; CHECK-NEXT: ret <2 x i8> %y
+; CHECK-NEXT: ret <2 x i8> [[Y:%.*]]
;
%s = select <2 x i1><i1 false, i1 false>, <2 x i8> %x, <2 x i8> %y
ret <2 x i8> %s
@@ -47,7 +74,7 @@ define <3 x i4> @vsel_undef_false_op(<3 x i4> %x, <3 x i4> %y) {
define i32 @test1(i32 %x) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%and = and i32 %x, 1
%cmp = icmp eq i32 %and, 0
@@ -58,7 +85,7 @@ define i32 @test1(i32 %x) {
define i32 @test2(i32 %x) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%and = and i32 %x, 1
%cmp = icmp ne i32 %and, 0
@@ -69,7 +96,7 @@ define i32 @test2(i32 %x) {
define i32 @test3(i32 %x) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -2
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], -2
; CHECK-NEXT: ret i32 [[AND1]]
;
%and = and i32 %x, 1
@@ -81,7 +108,7 @@ define i32 @test3(i32 %x) {
define i32 @test4(i32 %X) {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[OR:%.*]] = or i32 %X, -2147483648
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648
; CHECK-NEXT: ret i32 [[OR]]
;
%cmp = icmp slt i32 %X, 0
@@ -104,7 +131,7 @@ define i32 @test4noncanon(i32 %X) {
define i32 @test5(i32 %X) {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: ret i32 %X
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%cmp = icmp slt i32 %X, 0
%or = or i32 %X, -2147483648
@@ -114,7 +141,7 @@ define i32 @test5(i32 %X) {
define i32 @test6(i32 %X) {
; CHECK-LABEL: @test6(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 2147483647
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2147483647
; CHECK-NEXT: ret i32 [[AND]]
;
%cmp = icmp slt i32 %X, 0
@@ -125,7 +152,7 @@ define i32 @test6(i32 %X) {
define i32 @test7(i32 %X) {
; CHECK-LABEL: @test7(
-; CHECK-NEXT: ret i32 %X
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%cmp = icmp slt i32 %X, 0
%and = and i32 %X, 2147483647
@@ -135,7 +162,7 @@ define i32 @test7(i32 %X) {
define i32 @test8(i32 %X) {
; CHECK-LABEL: @test8(
-; CHECK-NEXT: ret i32 %X
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%cmp = icmp sgt i32 %X, -1
%or = or i32 %X, -2147483648
@@ -145,7 +172,7 @@ define i32 @test8(i32 %X) {
define i32 @test9(i32 %X) {
; CHECK-LABEL: @test9(
-; CHECK-NEXT: [[OR:%.*]] = or i32 %X, -2147483648
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648
; CHECK-NEXT: ret i32 [[OR]]
;
%cmp = icmp sgt i32 %X, -1
@@ -168,7 +195,7 @@ define i32 @test9noncanon(i32 %X) {
define i32 @test10(i32 %X) {
; CHECK-LABEL: @test10(
-; CHECK-NEXT: ret i32 %X
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%cmp = icmp sgt i32 %X, -1
%and = and i32 %X, 2147483647
@@ -178,7 +205,7 @@ define i32 @test10(i32 %X) {
define i32 @test11(i32 %X) {
; CHECK-LABEL: @test11(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 2147483647
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2147483647
; CHECK-NEXT: ret i32 [[AND]]
;
%cmp = icmp sgt i32 %X, -1
@@ -189,7 +216,7 @@ define i32 @test11(i32 %X) {
define <2 x i8> @test11vec(<2 x i8> %X) {
; CHECK-LABEL: @test11vec(
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> %X, <i8 127, i8 127>
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 127, i8 127>
; CHECK-NEXT: ret <2 x i8> [[AND]]
;
%cmp = icmp sgt <2 x i8> %X, <i8 -1, i8 -1>
@@ -246,7 +273,7 @@ define i32 @test13noncanon(i32 %X) {
define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
-; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 8
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 8
; CHECK-NEXT: ret i32 [[OR]]
;
%and = and i32 %x, 8
@@ -258,7 +285,7 @@ define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
define i32 @select_icmp_and_8_eq_0_or_8_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8_alt(
-; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 8
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 8
; CHECK-NEXT: ret i32 [[OR]]
;
%and = and i32 %x, 8
@@ -270,7 +297,7 @@ define i32 @select_icmp_and_8_eq_0_or_8_alt(i32 %x) {
define i32 @select_icmp_and_8_ne_0_or_8(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%and = and i32 %x, 8
%cmp = icmp ne i32 %and, 0
@@ -281,7 +308,7 @@ define i32 @select_icmp_and_8_ne_0_or_8(i32 %x) {
define i32 @select_icmp_and_8_ne_0_or_8_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8_alt(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
@@ -292,7 +319,7 @@ define i32 @select_icmp_and_8_ne_0_or_8_alt(i32 %x) {
define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], -9
; CHECK-NEXT: ret i32 [[AND1]]
;
%and = and i32 %x, 8
@@ -304,7 +331,7 @@ define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
define i32 @select_icmp_and_8_eq_0_and_not_8_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8_alt(
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], -9
; CHECK-NEXT: ret i32 [[AND1]]
;
%and = and i32 %x, 8
@@ -316,7 +343,7 @@ define i32 @select_icmp_and_8_eq_0_and_not_8_alt(i32 %x) {
define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%and = and i32 %x, 8
%cmp = icmp ne i32 %and, 0
@@ -327,7 +354,7 @@ define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
define i32 @select_icmp_and_8_ne_0_and_not_8_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8_alt(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
@@ -342,7 +369,7 @@ define i32 @select_icmp_and_8_ne_0_and_not_8_alt(i32 %x) {
define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128(
-; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 128
; CHECK-NEXT: ret i32 [[OR]]
;
%trunc = trunc i32 %x to i8
@@ -354,7 +381,7 @@ define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) {
define i32 @select_icmp_trunc_8_ne_0_or_128_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128_alt(
-; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 128
; CHECK-NEXT: ret i32 [[OR]]
;
%trunc = trunc i32 %x to i8
@@ -366,7 +393,7 @@ define i32 @select_icmp_trunc_8_ne_0_or_128_alt(i32 %x) {
define i32 @select_icmp_trunc_8_eq_0_or_128(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%trunc = trunc i32 %x to i8
%cmp = icmp slt i8 %trunc, 0
@@ -377,7 +404,7 @@ define i32 @select_icmp_trunc_8_eq_0_or_128(i32 %x) {
define i32 @select_icmp_trunc_8_eq_0_or_128_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128_alt(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%trunc = trunc i32 %x to i8
%cmp = icmp sgt i8 %trunc, -1
@@ -388,7 +415,7 @@ define i32 @select_icmp_trunc_8_eq_0_or_128_alt(i32 %x) {
define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -9
; CHECK-NEXT: ret i32 [[AND]]
;
%trunc = trunc i32 %x to i4
@@ -400,7 +427,7 @@ define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) {
define i32 @select_icmp_trunc_8_eq_0_and_not_8_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8_alt(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -9
; CHECK-NEXT: ret i32 [[AND]]
;
%trunc = trunc i32 %x to i4
@@ -412,7 +439,7 @@ define i32 @select_icmp_trunc_8_eq_0_and_not_8_alt(i32 %x) {
define i32 @select_icmp_trunc_8_ne_0_and_not_8(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%trunc = trunc i32 %x to i4
%cmp = icmp slt i4 %trunc, 0
@@ -423,7 +450,7 @@ define i32 @select_icmp_trunc_8_ne_0_and_not_8(i32 %x) {
define i32 @select_icmp_trunc_8_ne_0_and_not_8_alt(i32 %x) {
; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8_alt(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%trunc = trunc i32 %x to i4
%cmp = icmp sgt i4 %trunc, -1
@@ -436,7 +463,7 @@ define i32 @select_icmp_trunc_8_ne_0_and_not_8_alt(i32 %x) {
define <2 x i32> @select_icmp_and_8_ne_0_and_not_8_vec(<2 x i32> %x) {
; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8_vec(
-; CHECK-NEXT: ret <2 x i32> %x
+; CHECK-NEXT: ret <2 x i32> [[X:%.*]]
;
%and = and <2 x i32> %x, <i32 8, i32 8>
%cmp = icmp ne <2 x i32> %and, zeroinitializer
@@ -447,7 +474,7 @@ define <2 x i32> @select_icmp_and_8_ne_0_and_not_8_vec(<2 x i32> %x) {
define <2 x i32> @select_icmp_trunc_8_ne_0_and_not_8_alt_vec(<2 x i32> %x) {
; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8_alt_vec(
-; CHECK-NEXT: ret <2 x i32> %x
+; CHECK-NEXT: ret <2 x i32> [[X:%.*]]
;
%trunc = trunc <2 x i32> %x to <2 x i4>
%cmp = icmp sgt <2 x i4> %trunc, <i4 -1, i4 -1>
@@ -460,10 +487,10 @@ define <2 x i32> @select_icmp_trunc_8_ne_0_and_not_8_alt_vec(<2 x i32> %x) {
define i32 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i32 %y) {
; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %y, -9
-; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i32 %y, i32 [[AND1]]
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -9
+; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND1]]
; CHECK-NEXT: ret i32 [[Y_AND1]]
;
%and = and i32 %x, 8
@@ -475,10 +502,10 @@ define i32 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i32 %y) {
define i64 @select_icmp_x_and_8_eq_0_y64_and_not_8(i32 %x, i64 %y) {
; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y64_and_not_8(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
-; CHECK-NEXT: [[AND1:%.*]] = and i64 %y, -9
-; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i64 %y, i64 [[AND1]]
+; CHECK-NEXT: [[AND1:%.*]] = and i64 [[Y:%.*]], -9
+; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i64 [[Y]], i64 [[AND1]]
; CHECK-NEXT: ret i64 [[Y_AND1]]
;
%and = and i32 %x, 8
@@ -490,10 +517,10 @@ define i64 @select_icmp_x_and_8_eq_0_y64_and_not_8(i32 %x, i64 %y) {
define i64 @select_icmp_x_and_8_ne_0_y64_and_not_8(i32 %x, i64 %y) {
; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y64_and_not_8(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
-; CHECK-NEXT: [[AND1:%.*]] = and i64 %y, -9
-; CHECK-NEXT: [[AND1_Y:%.*]] = select i1 [[CMP]], i64 [[AND1]], i64 %y
+; CHECK-NEXT: [[AND1:%.*]] = and i64 [[Y:%.*]], -9
+; CHECK-NEXT: [[AND1_Y:%.*]] = select i1 [[CMP]], i64 [[AND1]], i64 [[Y]]
; CHECK-NEXT: ret i64 [[AND1_Y]]
;
%and = and i32 %x, 8
@@ -507,8 +534,8 @@ define i64 @select_icmp_x_and_8_ne_0_y64_and_not_8(i32 %x, i64 %y) {
define i32* @select_icmp_pointers(i32* %x, i32* %y) {
; CHECK-LABEL: @select_icmp_pointers(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32* %x, null
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32* %x, i32* %y
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32* [[X:%.*]], null
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32* [[X]], i32* [[Y:%.*]]
; CHECK-NEXT: ret i32* [[SEL]]
;
%cmp = icmp slt i32* %x, null
@@ -523,8 +550,8 @@ declare void @llvm.assume(i1)
define i8 @assume_sel_cond(i1 %cond, i8 %x, i8 %y) {
; CHECK-LABEL: @assume_sel_cond(
-; CHECK-NEXT: call void @llvm.assume(i1 %cond)
-; CHECK-NEXT: [[SEL:%.*]] = select i1 %cond, i8 %x, i8 %y
+; CHECK-NEXT: call void @llvm.assume(i1 [[COND:%.*]])
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X:%.*]], i8 [[Y:%.*]]
; CHECK-NEXT: ret i8 [[SEL]]
;
call void @llvm.assume(i1 %cond)
@@ -534,9 +561,9 @@ define i8 @assume_sel_cond(i1 %cond, i8 %x, i8 %y) {
define i8 @do_not_assume_sel_cond(i1 %cond, i8 %x, i8 %y) {
; CHECK-LABEL: @do_not_assume_sel_cond(
-; CHECK-NEXT: [[NOTCOND:%.*]] = icmp eq i1 %cond, false
+; CHECK-NEXT: [[NOTCOND:%.*]] = icmp eq i1 [[COND:%.*]], false
; CHECK-NEXT: call void @llvm.assume(i1 [[NOTCOND]])
-; CHECK-NEXT: [[SEL:%.*]] = select i1 %cond, i8 %x, i8 %y
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X:%.*]], i8 [[Y:%.*]]
; CHECK-NEXT: ret i8 [[SEL]]
;
%notcond = icmp eq i1 %cond, false
@@ -547,8 +574,9 @@ define i8 @do_not_assume_sel_cond(i1 %cond, i8 %x, i8 %y) {
define i32* @select_icmp_eq_0_gep_operand(i32* %base, i64 %n) {
; CHECK-LABEL: @select_icmp_eq_0_gep_operand(
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr
-; CHECK-NEXT: ret i32* [[GEP]]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[BASE:%.*]], i64 [[N:%.*]]
+; CHECK-NEXT: ret i32* [[GEP]]
+;
%cond = icmp eq i64 %n, 0
%gep = getelementptr i32, i32* %base, i64 %n
%r = select i1 %cond, i32* %base, i32* %gep
@@ -557,8 +585,9 @@ define i32* @select_icmp_eq_0_gep_operand(i32* %base, i64 %n) {
define i32* @select_icmp_ne_0_gep_operand(i32* %base, i64 %n) {
; CHECK-LABEL: @select_icmp_ne_0_gep_operand(
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr
-; CHECK-NEXT: ret i32* [[GEP]]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[BASE:%.*]], i64 [[N:%.*]]
+; CHECK-NEXT: ret i32* [[GEP]]
+;
%cond = icmp ne i64 %n, 0
%gep = getelementptr i32, i32* %base, i64 %n
%r = select i1 %cond, i32* %gep, i32* %base
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