[llvm] 22700f6 - AMDGPU: Annotate EXTRACT_SUBREGs with source register classes

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-01-07T21:56:16-05:00
New Revision: 22700f68e171aeb1182ecbe9e3e8fc10d8633e24

URL: https://github.com/llvm/llvm-project/commit/22700f68e171aeb1182ecbe9e3e8fc10d8633e24
DIFF: https://github.com/llvm/llvm-project/commit/22700f68e171aeb1182ecbe9e3e8fc10d8633e24.diff

LOG: AMDGPU: Annotate EXTRACT_SUBREGs with source register classes

This partially fixes GlobalISel import of the patterns, but removes a
lot of entriess from the end of the skipped pattern log.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstructions.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
index 27316f4c3eaf..89e52d63af2d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
@@ -694,12 +694,12 @@ multiclass BFIPatterns <Instruction BFI_INT,
   def : AMDGPUPat <
     (or (and i64:$y, i64:$x), (and i64:$z, (not i64:$x))),
     (REG_SEQUENCE RC64,
-      (BFI_INT (i32 (EXTRACT_SUBREG $x, sub0)),
-               (i32 (EXTRACT_SUBREG $y, sub0)),
-               (i32 (EXTRACT_SUBREG $z, sub0))), sub0,
-      (BFI_INT (i32 (EXTRACT_SUBREG $x, sub1)),
-               (i32 (EXTRACT_SUBREG $y, sub1)),
-               (i32 (EXTRACT_SUBREG $z, sub1))), sub1)
+      (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub0)),
+               (i32 (EXTRACT_SUBREG RC64:$y, sub0)),
+               (i32 (EXTRACT_SUBREG RC64:$z, sub0))), sub0,
+      (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$y, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$z, sub1))), sub1)
   >;
 
   // SHA-256 Ch function
@@ -713,12 +713,12 @@ multiclass BFIPatterns <Instruction BFI_INT,
   def : AMDGPUPat <
     (xor i64:$z, (and i64:$x, (xor i64:$y, i64:$z))),
     (REG_SEQUENCE RC64,
-      (BFI_INT (i32 (EXTRACT_SUBREG $x, sub0)),
-               (i32 (EXTRACT_SUBREG $y, sub0)),
-               (i32 (EXTRACT_SUBREG $z, sub0))), sub0,
-      (BFI_INT (i32 (EXTRACT_SUBREG $x, sub1)),
-               (i32 (EXTRACT_SUBREG $y, sub1)),
-               (i32 (EXTRACT_SUBREG $z, sub1))), sub1)
+      (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub0)),
+               (i32 (EXTRACT_SUBREG RC64:$y, sub0)),
+               (i32 (EXTRACT_SUBREG RC64:$z, sub0))), sub0,
+      (BFI_INT (i32 (EXTRACT_SUBREG RC64:$x, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$y, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$z, sub1))), sub1)
   >;
 
   def : AMDGPUPat <
@@ -729,7 +729,7 @@ multiclass BFIPatterns <Instruction BFI_INT,
   def : AMDGPUPat <
     (f32 (fcopysign f32:$src0, f64:$src1)),
     (BFI_INT (LoadImm32 (i32 0x7fffffff)), $src0,
-             (i32 (EXTRACT_SUBREG $src1, sub1)))
+             (i32 (EXTRACT_SUBREG RC64:$src1, sub1)))
   >;
 
   def : AMDGPUPat <
@@ -737,8 +737,8 @@ multiclass BFIPatterns <Instruction BFI_INT,
     (REG_SEQUENCE RC64,
       (i32 (EXTRACT_SUBREG $src0, sub0)), sub0,
       (BFI_INT (LoadImm32 (i32 0x7fffffff)),
-               (i32 (EXTRACT_SUBREG $src0, sub1)),
-               (i32 (EXTRACT_SUBREG $src1, sub1))), sub1)
+               (i32 (EXTRACT_SUBREG RC64:$src0, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$src1, sub1))), sub1)
   >;
 
   def : AMDGPUPat <
@@ -746,7 +746,7 @@ multiclass BFIPatterns <Instruction BFI_INT,
     (REG_SEQUENCE RC64,
       (i32 (EXTRACT_SUBREG $src0, sub0)), sub0,
       (BFI_INT (LoadImm32 (i32 0x7fffffff)),
-               (i32 (EXTRACT_SUBREG $src0, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$src0, sub1)),
                $src1), sub1)
   >;
 }
@@ -763,14 +763,14 @@ multiclass SHA256MaPattern <Instruction BFI_INT, Instruction XOR, RegisterClass
   def : AMDGPUPat <
     (or (and i64:$x, i64:$z), (and i64:$y, (or i64:$x, i64:$z))),
     (REG_SEQUENCE RC64,
-      (BFI_INT (XOR (i32 (EXTRACT_SUBREG $x, sub0)),
-                    (i32 (EXTRACT_SUBREG $y, sub0))),
-               (i32 (EXTRACT_SUBREG $z, sub0)),
-               (i32 (EXTRACT_SUBREG $y, sub0))), sub0,
-      (BFI_INT (XOR (i32 (EXTRACT_SUBREG $x, sub1)),
-                    (i32 (EXTRACT_SUBREG $y, sub1))),
-               (i32 (EXTRACT_SUBREG $z, sub1)),
-               (i32 (EXTRACT_SUBREG $y, sub1))), sub1)
+      (BFI_INT (XOR (i32 (EXTRACT_SUBREG RC64:$x, sub0)),
+                    (i32 (EXTRACT_SUBREG RC64:$y, sub0))),
+               (i32 (EXTRACT_SUBREG RC64:$z, sub0)),
+               (i32 (EXTRACT_SUBREG RC64:$y, sub0))), sub0,
+      (BFI_INT (XOR (i32 (EXTRACT_SUBREG RC64:$x, sub1)),
+                    (i32 (EXTRACT_SUBREG RC64:$y, sub1))),
+               (i32 (EXTRACT_SUBREG RC64:$z, sub1)),
+               (i32 (EXTRACT_SUBREG RC64:$y, sub1))), sub1)
   >;
 }