[PATCH] D72031: [Scheduling] Create the missing dependency edges for store cluster

[qshanz via Phabricator via llvm-commits]

steven.zhang marked an inline comment as done.
steven.zhang added inline comments.


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Comment at: llvm/lib/CodeGen/MachineScheduler.cpp:1598
+        // do not need to be copied from SUa to SUb since no one will depend
+        // on stores.
+        for (const SDep &Pred : SUb->Preds) {
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fhahn wrote:
> steven.zhang wrote:
> > fhahn wrote:
> > > I may be missing something, but IIRC stores could have other memory operations as successors, e.g. because to enforce an ordering between aliasing memory operations.
> > It they have memory dependency, they won't be put into the same group. 
> Ah right. The wording in the comment comment seems a bit general though, maybe it would be possible to mention that this is a constraint for the clustering. It might be good to add it as assert as well :)
ok. I will update the comments and the assertion if it is easy ... Thank you for the comments!


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https://reviews.llvm.org/D72031