[llvm] 39c0570 - [gicombiner] Correct 64f1bb5cd2c to account for MSVC's %p format

[Daniel Sanders via llvm-commits]

Author: Daniel Sanders
Date: 2020-01-07T12:50:05-08:00
New Revision: 39c05703a6ca4ada7043799bf8d84b5cdcd3346c

URL: https://github.com/llvm/llvm-project/commit/39c05703a6ca4ada7043799bf8d84b5cdcd3346c
DIFF: https://github.com/llvm/llvm-project/commit/39c05703a6ca4ada7043799bf8d84b5cdcd3346c.diff

LOG: [gicombiner] Correct 64f1bb5cd2c to account for MSVC's %p format

Added: 
    

Modified: 
    llvm/test/TableGen/GICombinerEmitter/match-tree.td

Removed: 
    


################################################################################
diff  --git a/llvm/test/TableGen/GICombinerEmitter/match-tree.td b/llvm/test/TableGen/GICombinerEmitter/match-tree.td
index 3664541e121b..fc911fb2f29c 100644
--- a/llvm/test/TableGen/GICombinerEmitter/match-tree.td
+++ b/llvm/test/TableGen/GICombinerEmitter/match-tree.td
@@ -84,26 +84,26 @@ def MyCombinerHelper: GICombinerHelper<"GenMyCombinerHelper", [
 ]>;
 
 // CHECK-LABEL: digraph "matchtree" {
-// CHECK-DAG:   Node[[N0:0x[0-9a-f]+]] [shape=record,label="{MI[0].getOpcode()|4 partitions|Rule0,Rule1,Rule2,Rule3,Rule4,Rule5,Rule6,Rule7}"]
-// CHECK-DAG:   Node[[N1:0x[0-9a-f]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|2 partitions|Rule0,Rule5}"]
-// CHECK-DAG:   Node[[N2:0x[0-9a-f]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule0,Rule5}"]
-// CHECK-DAG:   Node[[N3:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule0}"]
-// CHECK-DAG:   Node[[N4:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule5}"]
-// CHECK-DAG:   Node[[N5:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule5}"]
-// CHECK-DAG:   Node[[N6:0x[0-9a-f]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|2 partitions|Rule1,Rule2}"]
-// CHECK-DAG:   Node[[N7:0x[0-9a-f]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule1,Rule2}"]
-// CHECK-DAG:   Node[[N8:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule1}"]
-// CHECK-DAG:   Node[[N9:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule2}"]
-// CHECK-DAG:   Node[[N10:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule2}"]
-// CHECK-DAG:   Node[[N11:0x[0-9a-f]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|2 partitions|Rule3,Rule4}"]
-// CHECK-DAG:   Node[[N12:0x[0-9a-f]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule3,Rule4}"]
-// CHECK-DAG:   Node[[N13:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule3,Rule4}",color=red]
-// CHECK-DAG:   Node[[N14:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule4}"]
-// CHECK-DAG:   Node[[N15:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule4}"]
-// CHECK-DAG:   Node[[N16:0x[0-9a-f]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|1 partitions|Rule6,Rule7}"]
-// CHECK-DAG:   Node[[N17:0x[0-9a-f]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule6,Rule7}"]
-// CHECK-DAG:   Node[[N18:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule6}"]
-// CHECK-DAG:   Node[[N19:0x[0-9a-f]+]] [shape=record,label="{No partitioner|Rule7}"]
+// CHECK-DAG:   Node[[N0:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[0].getOpcode()|4 partitions|Rule0,Rule1,Rule2,Rule3,Rule4,Rule5,Rule6,Rule7}"]
+// CHECK-DAG:   Node[[N1:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|2 partitions|Rule0,Rule5}"]
+// CHECK-DAG:   Node[[N2:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule0,Rule5}"]
+// CHECK-DAG:   Node[[N3:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule0}"]
+// CHECK-DAG:   Node[[N4:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule5}"]
+// CHECK-DAG:   Node[[N5:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule5}"]
+// CHECK-DAG:   Node[[N6:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|2 partitions|Rule1,Rule2}"]
+// CHECK-DAG:   Node[[N7:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule1,Rule2}"]
+// CHECK-DAG:   Node[[N8:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule1}"]
+// CHECK-DAG:   Node[[N9:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule2}"]
+// CHECK-DAG:   Node[[N10:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule2}"]
+// CHECK-DAG:   Node[[N11:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|2 partitions|Rule3,Rule4}"]
+// CHECK-DAG:   Node[[N12:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule3,Rule4}"]
+// CHECK-DAG:   Node[[N13:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule3,Rule4}",color=red]
+// CHECK-DAG:   Node[[N14:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule4}"]
+// CHECK-DAG:   Node[[N15:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule4}"]
+// CHECK-DAG:   Node[[N16:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1] = getVRegDef(MI[0].getOperand(1))|1 partitions|Rule6,Rule7}"]
+// CHECK-DAG:   Node[[N17:(0x)?[0-9a-fA-F]+]] [shape=record,label="{MI[1].getOpcode()|2 partitions|Rule6,Rule7}"]
+// CHECK-DAG:   Node[[N18:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule6}"]
+// CHECK-DAG:   Node[[N19:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule7}"]
 
 // The most important partitioner is on the first opcode:
 // CHECK-DAG:   Node[[N0]] -> Node[[N1]] [label="#0 MyTarget::SUB"]