[PATCH] D72027: [XCOFF][AIX] Support basic relocation type on AIX

Jason Liu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 7 08:11:48 PST 2020


jasonliu marked an inline comment as done.
jasonliu added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp:86
+  case PPC::fixup_ppc_br24:
+    Result |= 25;
+    break;
----------------
DiggerLin wrote:
> jasonliu wrote:
> > DiggerLin wrote:
> > > DiggerLin wrote:
> > > > // The relocation encodes the bit length being relocated minus 1. Add back the 1 to // get the actual length being relocated.
> > > > this one should be 23 ?
> > > And my suggestion is to use a constexpr instead of using number directly here.
> > No, we have 25 in the actual object file. 
> the  bit length of the relocatable reference of PPC::fixup_ppc_br24 is 24 bits ?
> if it is , according to xcoff document .
> r_rsize : 0x3F(6 bits)
> Specifies the bit length of the relocatable reference minus one. The current architecture allows for fields of up to 32 bits (XCOFF32) or 64 bits (XCOFF64) to be relocated.
> 
> it should be 24bits -1 = 23.
Branches are 4 byte aligned, so the 24 bits we encode in the instruction actually represents a 26 bit offset (because the implication the bottom 2 bits are 0), so it is 26-1.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72027/new/

https://reviews.llvm.org/D72027





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