[llvm] f26ed6e - llc: Change behavior of -mcpu with existing attribute
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 7 07:10:48 PST 2020
Author: Matt Arsenault
Date: 2020-01-07T10:10:25-05:00
New Revision: f26ed6e47cb8b080c236d11c4942a12265180084
URL: https://github.com/llvm/llvm-project/commit/f26ed6e47cb8b080c236d11c4942a12265180084
DIFF: https://github.com/llvm/llvm-project/commit/f26ed6e47cb8b080c236d11c4942a12265180084.diff
LOG: llc: Change behavior of -mcpu with existing attribute
Don't overwrite existing target-cpu attributes.
I've often found the replacement behavior annoying, and this is
inconsistent with how the fast math command line flags interact with
the function attributes.
Does not yet change target-features, since I think that should behave
as a concatenation.
Added:
Modified:
llvm/include/llvm/CodeGen/CommandFlags.inc
llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
llvm/test/CodeGen/X86/avoid-sfb.ll
llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
llvm/test/DebugInfo/COFF/inlining-files.ll
llvm/test/DebugInfo/COFF/inlining-header.ll
llvm/test/Other/opt-override-mcpu-mattr.ll
llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/CommandFlags.inc b/llvm/include/llvm/CodeGen/CommandFlags.inc
index 225c44db9999..06e16f1973b3 100644
--- a/llvm/include/llvm/CodeGen/CommandFlags.inc
+++ b/llvm/include/llvm/CodeGen/CommandFlags.inc
@@ -380,7 +380,7 @@ setFunctionAttributes(StringRef CPU, StringRef Features, Function &F) {
AttributeList Attrs = F.getAttributes();
AttrBuilder NewAttrs;
- if (!CPU.empty())
+ if (!CPU.empty() && !F.hasFnAttribute("target-cpu"))
NewAttrs.addAttribute("target-cpu", CPU);
if (!Features.empty())
NewAttrs.addAttribute("target-features", Features);
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
index 673fff50b39c..b939816600ab 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -mcpu=gfx803 -run-pass si-memory-legalizer %s -o - | FileCheck %s
+# RUN: llc -march=amdgcn -run-pass=si-memory-legalizer %s -o - | FileCheck %s
--- |
declare i32 @llvm.amdgcn.workitem.id.x() #0
@@ -33,13 +33,8 @@
declare void @llvm.amdgcn.end.cf(i64)
- ; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #3
-
- attributes #0 = { nounwind readnone "target-cpu"="tahiti" }
- attributes #1 = { nounwind "target-cpu"="tahiti" }
- attributes #2 = { readnone }
- attributes #3 = { nounwind }
+ attributes #0 = { nounwind readnone }
+ attributes #1 = { nounwind "target-cpu"="gfx803" }
...
---
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir b/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
index 588c9a5df786..ccbc4ed87795 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
@@ -4,8 +4,11 @@
# FIXME: This overrides attributes that already are present. It should probably
# only touch functions without an existing attribute.
-# MCPU: attributes #0 = { "target-cpu"="hawaii" }
-# MCPU-NOT: attributes #1
+# MCPU: @with_cpu_attr() #0 {
+# MCPU: @no_cpu_attr() #1 {
+
+# MCPU: attributes #0 = { "target-cpu"="fiji" }
+# MCPU: attributes #1 = { "target-cpu"="hawaii" }
# MATTR: attributes #0 = { "target-cpu"="fiji" "target-features"="+unaligned-buffer-access" }
# MATTR: attributes #1 = { "target-features"="+unaligned-buffer-access" }
diff --git a/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll b/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
index bc48ed11711e..38b4e2ee0b0f 100644
--- a/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
+++ b/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-linux --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX2
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=skx -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX512
@@ -515,7 +515,6 @@ entry:
ret void
}
-attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
-attributes #1 = { argmemonly nounwind }
-
+attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { argmemonly nounwind }
diff --git a/llvm/test/CodeGen/X86/avoid-sfb.ll b/llvm/test/CodeGen/X86/avoid-sfb.ll
index 9d6c6c9c02ec..37f235288cc2 100644
--- a/llvm/test/CodeGen/X86/avoid-sfb.ll
+++ b/llvm/test/CodeGen/X86/avoid-sfb.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-linux --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX2
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=skx -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX512
@@ -1243,11 +1243,6 @@ if.end: ; preds = %if.then, %entry
declare void @bar(%struct.S*) local_unnamed_addr #1
-; Function Attrs: argmemonly nounwind
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #1
-
-attributes #0 = { nounwind uwtable "target-cpu"="x86-64" }
-
%struct.S7 = type { float, float, float , float, float, float, float, float }
; Function Attrs: nounwind uwtable
@@ -1527,5 +1522,7 @@ entry:
ret void
}
+; Function Attrs: argmemonly nounwind
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #1
-
+attributes #0 = { nounwind uwtable }
diff --git a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
index 293ceee3be90..228f2031bab7 100644
--- a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
+++ b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
@@ -1,12 +1,12 @@
; RUN: llc < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
-; Check that llc can overide function attributes target-cpu and target-features
+; Check that llc can set function attributes target-cpu and target-features
; using command line options -mcpu and -mattr.
; CHECK: vpsadbw (%r{{si|dx}}), %ymm{{[0-9]+}}, %ymm{{[0-9]+}}
-define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) #0 {
+define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) {
entry:
%ps1 = load <4 x i64>, <4 x i64>* %s1
%ps2 = load <4 x i64>, <4 x i64>* %s2
@@ -17,5 +17,3 @@ entry:
}
declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>)
-
-attributes #0 = { "target-cpu"="core2" "target-features"="+ssse3,+cx16,+sse4.2,+sse4.1,+sse,+sse2,+sse3,+avx,+popcnt" }
diff --git a/llvm/test/DebugInfo/COFF/inlining-files.ll b/llvm/test/DebugInfo/COFF/inlining-files.ll
index bfffa1128b27..ce92d20e093e 100644
--- a/llvm/test/DebugInfo/COFF/inlining-files.ll
+++ b/llvm/test/DebugInfo/COFF/inlining-files.ll
@@ -71,7 +71,7 @@ entry:
ret void, !dbg !30
}
-attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!8, !9, !10}
diff --git a/llvm/test/DebugInfo/COFF/inlining-header.ll b/llvm/test/DebugInfo/COFF/inlining-header.ll
index f19a983d591c..de8ea595b7b8 100644
--- a/llvm/test/DebugInfo/COFF/inlining-header.ll
+++ b/llvm/test/DebugInfo/COFF/inlining-header.ll
@@ -129,7 +129,7 @@ entry:
ret i32 %5, !dbg !32
}
-attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!8, !9, !10}
diff --git a/llvm/test/Other/opt-override-mcpu-mattr.ll b/llvm/test/Other/opt-override-mcpu-mattr.ll
index 84d4209a996a..967df2c7af83 100644
--- a/llvm/test/Other/opt-override-mcpu-mattr.ll
+++ b/llvm/test/Other/opt-override-mcpu-mattr.ll
@@ -1,13 +1,21 @@
; RUN: opt < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell -mattr=+avx2 -S | FileCheck %s
-; Check that opt can rewrite function attributes target-cpu and target-features
-; using command line options -mcpu and -mattr.
+; Check that opt can add but not rewrite function attributes
+; target-cpu and target-features using command line options -mcpu and
+; -mattr.
; CHECK: attributes #0 = { nounwind readnone ssp uwtable "target-cpu"="broadwell" "target-features"="+avx2" "use-soft-float"="false" }
+; CHECK: attributes #1 = { nounwind readnone ssp uwtable "target-cpu"="core2" "target-features"="+avx2" "use-soft-float"="false" }
-define i32 @foo1() #0 {
+define i32 @no_target_cpu() #0 {
entry:
ret i32 0
}
-attributes #0 = { nounwind readnone ssp uwtable "target-cpu"="core2" "target-features"="+ssse3,+cx16,+sse,+sse2,+sse3" "use-soft-float"="false" }
+define i32 @has_targe_cpu() #1 {
+entry:
+ ret i32 0
+}
+
+attributes #0 = { nounwind readnone ssp uwtable "target-features"="+ssse3,+cx16,+sse,+sse2,+sse3" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone ssp uwtable "target-cpu"="core2" "target-features"="+ssse3,+cx16,+sse,+sse2,+sse3" "use-soft-float"="false" }
diff --git a/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll b/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
index ac6e47c8daae..10477ddce9c9 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
@@ -21,7 +21,7 @@ target triple = "x86_64-pc-linux-gnu"
;CHECK: call void @llvm.masked.store
; Function Attrs: nofree norecurse nounwind uwtable
-define dso_local void @fold_tail(i32* noalias nocapture %p, i32* noalias nocapture readonly %q1, i32* noalias nocapture readonly %q2,
+define dso_local void @fold_tail(i32* noalias nocapture %p, i32* noalias nocapture readonly %q1, i32* noalias nocapture readonly %q2,
i32 %guard) local_unnamed_addr #0 {
entry:
%0 = sext i32 %guard to i64
@@ -113,7 +113,7 @@ define void @assume_safety(i32* nocapture, i32* nocapture readonly, i32* nocaptu
;CHECK: call void @llvm.masked.store
; Function Attrs: nofree norecurse nounwind uwtable
-define dso_local void @fold_tail_and_assume_safety(i32* noalias nocapture %p, i32* noalias nocapture readonly %q1, i32* noalias nocapture readonly %q2,
+define dso_local void @fold_tail_and_assume_safety(i32* noalias nocapture %p, i32* noalias nocapture readonly %q1, i32* noalias nocapture readonly %q2,
i32 %guard) local_unnamed_addr #0 {
entry:
%0 = sext i32 %guard to i64
@@ -143,7 +143,7 @@ for.inc:
br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !11
}
-attributes #0 = { norecurse nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { norecurse nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
diff --git a/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll b/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
index 385f76d4f0a6..2e31f6612346 100644
--- a/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
+++ b/llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll
@@ -67,7 +67,7 @@ entry:
; Function Attrs: nounwind readnone
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
-attributes #0 = { noinline nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="gfx700" "target-features"="+fp64-fp16-denormals,-fp32-denormals" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { noinline nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-features"="+fp64-fp16-denormals,-fp32-denormals" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
!llvm.dbg.cu = !{!0}
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